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proc
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thread-self
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root
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usr
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lib
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firmware
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qcom
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sm8750
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File Content:
adsp_dtb.mbn
ELF (�4 4 � � (� (�s s � 8 8 CFGL � � 0D � # default_process-pakala-1.0-adsp.dtb �E � # charger_process-pakala-1.0-adsp.dtb �N � � ! audio_process-pakala-1.0-adsp.dtb �] h � qsh_process-pakala-1.0-adsp.dtb $j � � ois_process-pakala-1.0-adsp.dtb �r H � 0 default_process-pakala-qrd-1.0-adsp-overlay.dtbo� �� D0 8 � ( A� l qcom,pakala qcom,pakala aliases ,/soc/spmi_bus@c400000 6/soc/spmi_bus@c431000 soc @ O clock-controller@100000 qcom,gcc-pakala qcom,cc-pakala � H 0 @ P ` p � � � � � / B / B � LGCC_GPLL0_CM_PLL_TAYCAN_COMMON GCC_GPLL1_CM_PLL_TAYCAN_COMMON GCC_GPLL2_CM_PLL_TAYCAN_COMMON GCC_GPLL3_CM_PLL_TAYCAN_COMMON GCC_GPLL4_CM_PLL_TAYCAN_COMMON GCC_GPLL5_CM_PLL_TAYCAN_COMMON GCC_GPLL6_CM_PLL_TAYCAN_COMMON GCC_GPLL7_CM_PLL_TAYCAN_COMMON GCC_GPLL8_CM_PLL_TAYCAN_COMMON GCC_GPLL9_CM_PLL_TAYCAN_COMMON GCC_JBIST_CM_PLL_JBIST4_COMMON GCC_AHB2PHY_SWMAN GCC_AHB2PHY_BROADCAST_SWMAN GCC_CLK_CTL_REG GCC_RPU_RPUQ7_200_CL36L12_LE GCC_RPU_XPU4 V @ � clock-controller@1f40000 ( qcom,lpass_aon_cc-pakala qcom,cc-pakala P H� � � � �� � �` �p � &� 4 LTCSR_TCSR_REGS LPASS_QDSP6SS_PUB LPASS_QDSP6SS_QDSP6SS_QDSP6SSV79_CORE_CC_SWI LPASS_QDSP6SS_PLL_PLL_CM_PLL_TAYCAN_COMMON LPASS_QDSP6SS_QDSP6SSV79_CORE_CC_REG LPASS_AON_CC_PLL_CM_PLL_TAYCAN_COMMON LPASS_AON_CC_AHB2PHY_SWMAN LPASS_AON_CC_AHB2PHY_BROADCAST_SWMAN LPASS_AON_CC_LPASS_AON_CC_REG LPASS_LPI_TCM_REG V @ P clock-controller@7700000 + qcom,lpass_aon_mx_cc-pakala qcom,cc-pakala Hp p` pp p� � � LLPASS_AON_MX_CC_RO_PLL_CM_PLL_PONGO_COMMON LPASS_AON_MX_CC_AHB2PHY_SWMAN LPASS_AON_MX_CC_AHB2PHY_BROADCAST_SWMAN LPASS_AON_MX_CC_LPASS_AON_MX_CC_REG V @ Q clock-controller@6bc0000 * qcom,lpass_audio_cc-pakala qcom,cc-pakala 0 H� � � �` �p �� � LLPASS_AUDIO_CC_PLL_CM_PLL_ZONDA_COMMON LPASS_AUDIO_CC_DIG_PLL_CM_PLL_TAYCAN_COMMON LPASS_AUDIO_CC_LCC_PLL_CM_PLL_JBIST4_COMMON LPASS_AUDIO_CC_AHB2PHY_SWMAN LPASS_AUDIO_CC_AHB2PHY_BROADCAST_SWMAN LPASS_AUDIO_CC_LPASS_AUDIO_CC_REG V @ R clock-controller@7b00000 ) qcom,lpass_core_cc-pakala qcom,cc-pakala 0 H� �` �p �� � 0 � � LLPASS_LPASS_CORE_CC_DIG_PLL_LPASS_CORE_CC_DIG_PLL_CM_PLL_TAYCAN_COMMON LPASS_LPASS_CORE_CC_LPASS_CORE_CC_AHB2PHY_SWMAN LPASS_LPASS_CORE_CC_LPASS_CORE_CC_AHB2PHY_BROADCAST_SWMAN LPASS_LPASS_CORE_CC_LPASS_CORE_CC_LPASS_CORE_CC_REG LPASS_HW_AF_CORE LPASS_CORE_GDSC V @ S clock-controller@6e40000 * qcom,lpass_lpmla_cc-pakala qcom,cc-pakala H� �` �p � @ � LLPASS_LPMLA_CC_DIG_PLL_CM_PLL_TAYCAN_COMMON LPASS_LPMLA_CC_AHB2PHY_SWMAN LPASS_LPMLA_CC_AHB2PHY_BROADCAST_SWMAN LPASS_LPMLA_CC_LPASS_LPMLA_CC_REG V @ T clock-controller@7a00000 qcom,scc-pakala qcom,cc-pakala H� LSSC_SCC_SCC_SCC_REG V @ } cesta@7213000 '